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Comparison_of_EDA_software (5650 views - EDA & PCB (Electronics))
3D CAD Models - electronic
Comparison_of_EDA_software
Comparison_of_EDA_software
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Comparison of Electronic design automation (EDA) software
Free and open-source software (FOSS)
| Name | Architecture | License | Autorouter | Comment |
|---|---|---|---|---|
| Electric | *BSD, Java | GPL | Yes | VLSI circuit design tool with connectivity at all levels. Can also be used for schematic entry and PCB design. |
| FreePCB | w32 | GPL | Yes | A printed circuit board design program for Microsoft Windows. FreePCB allows for up to 16 copper layers, both metric and US customary units, and export of designs in Gerber format. Boards can be partially or fully autorouted with the FreeRouting[1] autorouter by using the FpcROUTE Specctra (ru) DSN design file translator. |
| gEDA | *BSD, Linux, Mac | GPL | Yes | schematic, simulation, PCB editor, gerber view |
| Gnucap | Unix | GPL3 | Mixed-signal circuit simulator | |
| Icarus Verilog | *BSD, Linux, Mac | GPL | Verilog simulator | |
| KiCad | *BSD, Windows, Linux, Mac | GNU GPL | Built-in, or FreeRouting | Full package for schematic and board design, etc. Design rule checking. User-defined symbols and footprints. Gerber/ drill file creation. Graphic interface. Active user community. |
| KTechLab | Linux | GPL | n/a | KTechLab is a schematic capture and simulator. It is specifically geared toward mixed signal simulation of analog components and small digital processors. |
| Magic | Linux | BSD license | no | A popular very-large-scale integration layout tool |
| Ngspice | Linux, Solaris, Mac, NetBSD, FreeBSD, w32 | BSD | SPICE + XSPICE + Cider | |
| Oregano | GPL | no | Schematic capture + spice simulation | |
| Pad2Pad | GPL | Yes | A PCB design program for Windows featuring auto-routing, error checking, and DXF import/export. | |
| Quite Universal Circuit Simulator (QUCS) | Linux, Solaris, Mac, NetBSD, FreeBSD, w32 | GPL | Schematic capture + Verilog + VHDL + simulation | |
| Verilator | Posix | GPL | Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog into cycle accurate C++ or SystemC code following 2-state synthesis (zero delay) semantics. Benchmarks reported on its website suggest it is several times faster than commercial event driven simulators such as ModelSim, NC-Verilog and VCS, while not quite as fast as commercial cycle accurate modeling tools such as Carbon ModelStudio and ARC VTOC. | |
| XCircuit | Unix | GPL | Used to produce netlists and publish high-quality drawings. |
Comparison of EDA packages
| Application and developer | Latest version/release + date | Schematic? | Simulation? | PCB editing? | Runs on POSIX style systems? | Runs on Windows? | Other platforms? | Open source? |
Cost | User Interface Language(s) | Imports | Exports | Scripting support |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Advanced Design System by Keysight EEsof EDA | 2016.01 28 January 2016 (21 months ago) (2016-01-28)[2] |
Yes | Yes | Yes | Yes[3] | Yes[3] | SuSE, RHEL[3] | No | en | HSPICE, SPICE, Spectre netlists; Gerber/drill, ODB++, artwork; more | HSPICE, SPICE, Spectre netlists; Gerber/drill, ODB++, artwork; more | Python, Application Extension Language (proprietary; "AEL") | |
| Active-HDL by Aldec | 10.3 16 March 2016 (19 months ago) (2016-03-16) |
Yes | Yes | No | No | Yes | No | No | en | EDIF, Viewlogic, more | PDF, HTML, Verilog, VHDL, EDIF, Zuken, more | ||
| Altium Designer (former Protel) by Altium | 17.0 16 November 2016 (11 months ago) (2016-11-16) |
Yes | Yes | Yes | No | Yes | Wine | No | Multilingual | OrCAD, Allegro, PADS Logic, PADS PCB, Expedition, DxDesigner, EAGLE, Gerber, STEP, IDF, more | 3D PDF, Gerber/drill, Gerber X2, ODB++, DXF, STEP, OrCAD, EAGLE, more | Delphi, JS, VB | |
| AutoTRAX by DEX 2020 | 10.110 30 October 2017 (11 days ago) (2017-10-30) |
Yes | Yes | Yes | No | Yes | Mac, Wine | No | Various | EAGLE, P-CAD, PADS, OrCAD, Gerber, DXF | Gerber/drill, DXF, P-CAD, PADS, OrCAD | Python, IronPython - C# .NET | |
| CADSTAR, Board Designer, and Visula by Zuken | 17 31 May 2016 (17 months ago) (2016-05-31) |
Yes | Yes, Spice | Yes | No | Yes | No | No | en | PADS, OrCAD, P-CAD, Protel, DXF, IDF | PDF, Gerber/drill, ODB++, DXF, IDF more | ||
| CircuitLogix by Logic Design Inc. | Release 9.1 January 2013 (4 years ago) (2013-01) |
Yes | Yes | Yes | No | Yes | No | No | en | SPICE, Gerber, DXF | SPICE, PDF, Gerber, DXF, | ||
| CircuitMaker by Altium | 1.3.0.119 August 2016 (1 year ago) (2016-08) |
Yes | No | Yes | Yes | Yes | Mac, Wine | No | en | AD09, AD10, AD12, PADS, P-CAD, OrCAD, Protel, EAGLE, DXF | Gerber/drill, DXF, STEP, more | ||
| CircuitStudio by Altium | 1.3.0.26 29 November 2016 (11 months ago) (2016-11-29) |
Yes | Yes | Yes | Yes | Yes | Mac, Wine | No | en | AD09, AD10, AD12, PADS, P-CAD, OrCAD, Protel, EAGLE, DXF | Gerber/drill, SPICE, DXF, STEP, more | ||
| CR-5000 by Zuken | 13 17 May 2011 (6 years ago) (2011-05-17) |
Yes | Yes, SI & PI | Yes | Yes | Yes | Unix, Linux | No | en, jp | EDIF, DXF, IGES, IDF, BSDL, STEP, ACIS, Gerber/drill, more | PDF, Gerber/drill, ODB++ (must request[4]), DXF, STEP, IPC D-356, IPC-2581, EPS, ACIS | ||
| DipTrace by Novarm | 3.1.0.1 27 June 2017 (4 months ago) (2017-06-27) |
Yes | External (Spice netlist export) |
Yes | Yes | Yes | Mac, Wine | No | 21 languages | EAGLE, Altium, P-CAD, PADS, OrCAD, Gerber, N/C Drill, DXF, BSDL Pinlist, Netlists | Gerber/drill, Gerber X2, ODB++, DXF, P-CAD, PADS, OrCAD, IPC-D-356, STEP, VRML, Pick and Place, CSV, BOM | ||
| DesignSpark PCB from RS Components | 7.2 16 June 2016 (16 months ago) (2016-06-16) |
Yes | Yes, Spice | Yes | No | Yes | No | No | Various | EAGLE, DXF, EDIF | Gerber/drill, ODB++, IDF, PDF, more | ||
| Autodesk EAGLE | 8.3.2 6 September 2017 (2 months ago) (2017-09-06) |
Yes | LTspice, PCBSim |
Yes | Yes | Yes | Linux, Mac | No | de, en, zh, hu, ru | EAGLE (XML), ACCEL (P-CAD, Altium, Protel), ULTIBOARD, Netlists, BMP, Custom | EAGLE (XML), Protel, Netlists, Images, Gerber, Excellon, Sieb & Meyer, HPGL, PostScript/EPS, PDF, Images, HyperLynx, IDF, Custom | Proprietary User Language Programming (ULP) | |
| EasyEDA | 4.1.3 14 January 2017 (9 months ago) (2017-01-14) |
Yes | Ngspice | Yes | Yes | Yes | Linux, Mac | No | en, fr, de, pl, jp, ru, es, se, ua, zh ... | Altium, Eagle, Kicad libraries, LTspice .asc/.asy files, JSON, Spice | PDF, PNG, SVG, JSON, Gerber/drill, Pick and Place CSV file, CSV-formatted drill chart, Bill of Materials CSV file, Altium netlist, FreePCB netlist, PADS Layout Netlist, Spice netlist. | JSON | |
| EDWinXP | 2.00 18 December 2015 (22 months ago) (2015-12-18) |
Yes | EDSpice | Yes | No | Yes | No | No | en | Altium, Orcad PCB II Wirelist, VHDL, ODB++ ,SPICE | Gerber/drill, Pick and Place CSV file, CSV-formatted drill chart, Bill of Materials CSV file, Altium netlist, FreePCB netlist, PADS Layout Netlist, Spice netlist, Xilinx Netlist, JEDEC Netlist, Scicards Schematic Netlist. | ||
| Fritzing | 0.9.3b[5] 3 June 2016 (16 months ago) (2016-06-03) |
Yes, + breadboard | No | Yes | Yes | Yes | Linux, Mac | Yes | en, de, nl, es, it, fr, pt, ru, zh, jp, ... | gEDA symbols, KiCad symbols, SVG | Gerber, DIY etching, BOM, SVG, PDF, EPS | ||
| gEDA | 1.8.2[6] 25 September 2013 (4 years ago) (2013-09-25) |
Yes | Yes | Yes | Yes | Yes | Linux, Mac | Yes | en | gschem netlists, image as background | Gerber/[Excellon format|drill],SVG, PDF, EPS, PNG, GIF, JPEG, Specctra, XYRS | yes | |
| pcb-rnd | 1.2.5[7] 21 August 2017 (2 months ago) (2017-08-21) |
No | No | Yes | Yes | No | Linux, Mac | Yes | en | gschem netlists, Protel Autotrax, Kicad (legacy & s-expr layouts), Eagle (XML & v3,4,5 binary layouts), eeschema netlists, mentor netlists, TinyCad netlists, LT-Spice, MUCS, Specctra, Mentor Graphics Hyperlynx, BMP, JPG, GIF, HPGL, image as background | Gerber/[Excellon format|drill],SVG, PDF, EPS, PNG, GIF, JPEG, Specctra, Protel Autotrax, Kicad (legacy & s-expr), dxf, FidocadJ, Mentor Graphics Hyperlynx, template configurable XYRS/BOM | Multiple languages | |
| KiCad | 4.0.7[8] 28 August 2017 (2 months ago) (2017-08-28) |
Yes | Yes | Yes | Yes | Yes | Linux, Mac | Yes | zh_CN, de, en, es, fr, it, pt, ru, ja, pl, cz | TinyCAD net lists, OrCAD EDIF, EAGLE (XML) | PDF, Gerber/drill, Gerber X2, netlist, VRML2, IDFv3 | Python | |
| Upverter | 3.0 29 August 2014 (3 years ago) (2014-08-29) |
Yes | No | Yes | Yes | Yes | Web application | No | en | Altium, OrCad, PDF, OpenJSON, Eagle | PDF, Gerber/drill, netlist, PADS Layout Netlist, Tempo Automation, Pick and Place CSV, High-Res PNG, STL, CSV-formatted drill chart, CSV-formatted list of all parts | ||
| Various SmartSpice, Expert, Guardian, Hipex, and more products by Silvaco | N/A | Yes | Yes | No | Yes | Yes | Linux | No | en, cn, kr, jp | Various: HSPICE, Spectre, Verilog-A, SPICE, EDIF, GDSII | Various: SPICE, SPEF, GDSII | ||
| Various (Board Station, PADS Layout VX.0, Expedition, xDxDesigner, HyperLynx, ECAD Collaborator...), by Mentor Graphics | N/A | Yes | Yes | Yes | Yes | Yes | No | No | en | ODB++ | GGerber/drill, BoM, IDF, ODB++ | ||
| Micro-Cap by Spectrum Software | 11.0.2.0 3 September 2016 (13 months ago) (2016-09-03) |
Yes | Yes | No | No | Yes | No | No | en, jp | HSPICE, PSPICE, SPICE3, netlists, Images, IBIS, Touchstone | SPICE text file, netlist, BOM, Protel,Accel,OrCad,PADS netlists, Schematic and Analysis Plots Images, Numeric Output Text,Excel | ||
| PCB Investigator by easyLogix Schindler & Schill GmbH | 3.4.4 June 2012 (5 years ago) (2012-06) |
No | No | Yes | No | Yes | No | No | en | ODB++, Gerber/drill, Sieb & Meyer, GenCAD 1.4, DXF, IPC2581 | ODB++, DXF, Catia-Script, X-File, BOM, GenCAD 1.4, Gerber, other | ||
| Pulsonix | Release 9.0 |
Yes | Yes | Yes | No | Yes | Wine | No | en | Allegro, Altium, CadStar, Eagle, OrCAD, PADS, P-CAD, Protel, Gerber, STEP, DXF, IDF, more | Gerber/drill, ODB++, IPC-2581, Gerber X2, PDF, DXF, STEP, IDF, BOM, more | Proprietary language, ActiveX | |
| SLED by Dolphin Integration | Release 6.1 December 2013 (3 years ago) (2013-12) |
Yes | Yes | No | Yes | Yes | Linux | No | en | EDIF, ASCII, Several netlist formats | EDIF, Several netlist formats, CSDF, SPI3, more | ||
| TARGET 3001! | 19.3.0.46 24 October 2017 (17 days ago) (2017-10-24) |
Yes | Yes | Yes | No | Yes | No | No | en, de, fr | Eagle, DXF, Gerber, XGerber, Excellon, BMP, CXF, STEP 3D | XGerber, Excellon, Eagle, HPGL, G-Code (Milling), CXF, STEP 3D, Excel BOMs, Pick&Place, GenCAD, FABmaster, IPC D-356, Test points, Netlists, OBJ, POV-Ray, PDF | ||
| NI Ultiboard and Multisim by National Instruments | 14.1 1 March 2017 (8 months ago) (2017-03-01) [9] |
Yes | Yes | Yes | No | Yes | Web application [10] | No | en | MS*, MP*, EWB, Spice, OrCAD, UltiCap, Protel, Gerber, DXF, Ultiboard 4&5, Calay | BOM, Gerber/drill, IGES (3D), DXF (2D & 3D), SVG | ||
| Various Allegro and OrCAD products by Cadence Design Systems | N/A | Yes | Yes | Yes | Yes | Yes | AIX, Solaris, Linux | No | Several | PADS, PCAD, Eagle, Altium, Gerber, DXF, IDF, IFF | DXF, IDF, IPC356, OrCAD netlist, ODB++, STEP, IPC-2581, STL | Proprietary SKILL language, and some TCL | |
| Viewlogic by Synopsys | Unknown | No | No | Yes | Yes | Yes | Unknown | No | en | Unknown | Unknown | ||
| Scheme-it by Digi-Key | N/A | Yes | No | No | Yes | Yes | Web application | No | en | Unknown | Unknown | ||
| 123D Circuits by Autodesk | N/A | Yes, + breadboard | Yes | Yes | Yes | Yes | Web application | No | en | Eagle | Gerber | ||
| Application and developer | Latest version/release + date | Schematic? | Simulation? | PCB editing? | Runs on POSIX style systems? | Runs on Windows? | Other platforms? | Open source? |
Cost | User Interface Language(s) | Imports | Exports | Scripting support |
Note: ODB++ support is drawn partly from lists by Artwork Conversion Software[4] and Mentor Graphics[11]
See also
AltiumLeiterplatteZukenMentor GraphicsSchematic captureElectronic Design AutomationCadence Design SystemsProgrammpaket
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EDA & PCB (Electronics)
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